Motherboards or other superordinate electronic units have slots into which a respective memory module can be inserted by its contact strip. The contact strip has a plurality of contact terminals arranged on one or preferably on both main surfaces of a printed circuit board of the memory module. In particular memory modules equipped with memory components on two sides and provided with the contact strip on two sides (DIMM; Dual Inline Memory Module) make it possible to operate a particularly high number of memory components, for example, housed semiconductor components such as DRAMs (Dynamic Random Access Memory), for instance. The DRAMs or other volatile (and also non-volatile) semiconductor components can be arranged, for example, in the form of housed memory components on the main surfaces of the printed circuit board of the memory module. The chip housings of the memory components can be BGAs (Ball Grid Arrays), for example, which each have a plurality of external contact terminals (typically hundreds of them).
One possible design of memory modules provides for the data values intended for the memory components, that is to say both the data values to be stored in the memory components and the data values that are read out or to be read out from the semiconductor components, to be communicated via conductor tracks which connect the relevant memory component to the contact strip (that is to say to the respective contact terminal of the contact strip). In this case, the memory components are connected directly to the contact strip in parallel with one another. The control signals and address signals, in contrast, are not conducted directly from the contact strip to the respective memory component, but rather are communicated via an interposed further component, a register component. In these so-called “registered DIMM”, the line paths for the control and address signals thus run via conductor tracks connected to the contact strip, via a register component and then via conductor tracks connected downstream of the register component to the respective semiconductor component. The control and address signals are also combined as “CA Bus” or “CA Data” (Control Address). These data are buffered via the register component, thereby avoiding interference that otherwise arises at least at high transmission frequencies on account of the high capacitance value resulting from the large number of parallel-connected semiconductor components or conductor tracks to be biased in parallel with one another.
In another design, the so-called fully buffered DIMM (FBD), the data values which are to be stored and are to be read out or are read out could also be buffered, to be precise via a buffer component serving for buffering and subsequently forwarding both the data values, the control signals and the address signals. Such an advanced memory buffer (AMB) therefore also distributes the data values to be written between the respective memory components. Consequently, in each case the memory components are no longer connected directly to the contact strip by its own data lines. Instead, both the data lines and the control and address lines lead from the contact strip (through the printed circuit board) firstly to the buffer component. The memory components are connected to the buffer component in each case by dedicated control lines, address lines and data lines, to be precise preferably in parallel with one another.
In this case, the number of memory components which can be integrated and can be driven practically on a memory module is limited. A buffer component can drive, for example, only memory components of two memory banks (“ranks”). If nine semiconductor components are driven per rank, for example, then a maximum of eighteen memory components can be connected to the buffer component, to be operated on the respective memory module. In order to operate a higher number of semiconductor memory components, further slots of the motherboard or of the superordinate electronic unit are usually utilized, into which additional memory modules are inserted. By way of example, four memory modules can be inserted into four slots of a motherboard, in each case eighteen memory components (corresponding to two memory banks) being operated on each memory module. In the event of the driving of the buffer components of the memory modules, use is made, for example, of data frames created in accordance with defined data protocols. Data packets, the respective buffer component and thus the respective memory module identify, on the basis of the data frames, which data are intended in each case for the relevant memory module and which are not.
Nevertheless, there is conventionally the restriction to a predetermined maximum number of memory components which can be operated per slot.